Emulation Hardware

There are three elements of the RAMP FPGA infrastructure:
  1. Desktop development board.  Low cost, readily available, pre-verified design target
  2. Desktop FPGA chip cluster (e.g. BEE).  Closely interconnected group of FPGAs, ideally a fraction of a stack.
  3. Stack of modules for both local and online access. Initially slated for internal use, eventually to be made available to the entire DOE community.

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