J.A. Ang, R.F. Barrett, R.E. Benner, D. Burke, C. Chan, J. Cook, C.S. Daley, D. Donofrio, S.D. Hammond, K.S. Hemmert, R.J. Hoekstra, K. Ibrahim, S.M. Kelly, H. Le, V.J. Leung, G. Michelogiannakis, D.R. Resnick, A.F. Rodrigues, J. Shalf, D. Stark, D. Unat, N.J. Wright, G.R. Voskuilen, ”Abstract Machine Models and Proxy Architectures for Exascale Computing Version 2.0,” DOE Technical Report (joint report of Sandia Laboratories and Berkeley Laboratory), June, 2016.
J.A. Ang1, R.F. Barrett1, R.E. Benner1, D. Burke2,
C. Chan2, D. Donofrio2, S.D. Hammond1,
K.S. Hemmert1, S.M. Kelly1, H. Le1, V.J. Leung1,
D.R. Resnick1, A.F. Rodrigues1,
Sandia National Laboratories1 Albuquerque, New Mexico, USA
Lawrence Berkeley National Laboratory2 Berkeley, California, USA
To achieve Exascale computing, fundamental hardware architectures must change. The most significant consequence of this assertion is the impact on the scientific applications that run on current High Performance Computing (HPC) systems, many of which codify years of scientific domain knowledge and refinements for contemporary computer systems. In order to adapt to Exascale architectures, developers must be able to reason about new hardware and determine what programming models and algorithms will provide the best blend of performance and energy efficiency into the future. While many details of the Exascale architectures are undefined, an abstract machine model is designed to allow application developers to focus on the aspects of the machine that are important or relevant to performance and code structure. These models are intended as communication aids between application developers and hardware architects during the co-design process. We use the term proxy architecture to describe a parameterized version of an abstract machine model, with the parameters added to ellucidate potential speeds and capacities of key hardware components. These more detailed architectural models are formulated to enable discussion between the developers of analytic models and simulators and computer hardware architects. They allow for application performance analysis and hardware optimization opportunities. In this report our goal is to provide the application development community with a set of models that can help software developers prepare for Exascale and through the use of proxy architectures, we can enable a more concrete exploration of how well application codes map onto the future architectures.